Novel 3d Chip Interconnect Technology - Terapede® Technology

Dallas, TX, July 06, 2010 --(PR.com)-- Terapede, LLC announces the recent granting of U.S. Patent 7,745,301 for its 3D chip-to-chip interconnect technology. Appropriately named Terapede® technology, the patented technology is a process for producing and aligning ultra-high-density conductive pads (in the order of 8e7/cm2, as compared to 1e4/cm2 for ball-grid arrays (BGAs) and vias) on wafer chips for interconnection. Because the conductive pads are so small, capacitance is very low, thereby enabling the Terapede® technology to provide for high-speed communications (4+GHz, as compared to BGAs and vias at 100MHz) between interconnected chips. Company officials believe that products that will use this technology will be wide ranging, especially in image collection and processing areas, and will provide chip designers with design capabilities never before possible. The company's website, www.terapede.com, provides additional information about the Terapede® technology.

###