The Super Mini-Emulator VAXEL Adds UltraScale to Its Lineup Boosting the DUT Block Size to 6 Million Gates
VAXEL is a market proven Super Mini-Emulator using FPGA evaluation boards. It has full capabilities for RTL design verification and yet the license is very affordable. Major Japanese OEMs are equipping all their RTL designers with VAXEL and saving weeks and months from their ASIC development projects.
San Jose, CA, August 20, 2018 --(PR.com)-- VAXEL Incorporated, the developer of the innovative verification acceleration tool, VAXEL, has announced today that it added the Xilinx, Zynq UltraScale Evaluation board to its lineup of supported FPGA boards.
Tadd Matsuoka, CEO, VAXEL Incorporated stated that, "This marks a significant addition to our block-level-focus RTL verification acceleration tool. Addition of the UltraScale EK-U1-ZCU102-G will increase the DUT size that we can verify from 4 million gates to 6 million gates."
VAXEL previously supported ZC702 and ZC706 both from Xilinx.
"Our architecture is FPGA agnostic. Therefore, we are always trying to support more popular FPGA boards in the market. Xilinx has been our choice and they have been a very good partner to us too," added Matsuoka.
The VAXEL suite comes with 4 piece set of software: 1. VAXEL Console, a Windows application that includes FPGA Synthesis automation tools with the features to execute the verification from the host PC, 2. VAXEL Firm, an ARM firmware that installs at one of the ARM cores on the FPGA board and translates commands and requests from VAXEL Console and configures the FPGA, 3. Pre-qualified hardware IP blocks, and 4. A set of software libraries and interfaces to enable C and Python engineers to have additional contribution during the RTL verification phase.
The biggest benefit that VAXEL offers is the speed of test execution, thanks to the FPGA boards, with an additional significant benefit which is the ease of set up. With the software suite above, the setting up of the Test Bench becomes very easy allowing, furthermore, reuse of the set-up assets avoiding thus a waste of cost and time. This is a paradigm shift from the UVM and System Verilog world of verification.
VAXEL fits especially well in ASIC projects targeted for image processing, sensor ASICS, and AI chips because they frequently require a large test data set and numerous test cases where increasing the test coverage is not the most important goal.
VAXEL is architected such that it can connect an unlimited number of FPGA boards via USB and as such can run verification of multiple blocks. It also comes with assertion IPs and waveform extraction IPs.
VAXEL is just like a mini-Emulator that is extremely cost effective and this has been proven by a handful of Japanese image giants.
About VAXEL Inc.
VAXEL Inc www.vaxelinc.com was founded by a group of top verification engineers from Japan who provided design verification services to major Japanese OEMs for over 10 years. The verification acceleration tool VAXEL was invented by Yasu Sakakibara CTO and released to the market in 2017. The company has its HQ in San Jose CA and is let by Tadd Matsuoka CEO who has 30 years of experience in the semi-conductor industry. VAXEL is a Xilinx partner.
For contact email sales@vaxelinc.com
Tadd Matsuoka, CEO, VAXEL Incorporated stated that, "This marks a significant addition to our block-level-focus RTL verification acceleration tool. Addition of the UltraScale EK-U1-ZCU102-G will increase the DUT size that we can verify from 4 million gates to 6 million gates."
VAXEL previously supported ZC702 and ZC706 both from Xilinx.
"Our architecture is FPGA agnostic. Therefore, we are always trying to support more popular FPGA boards in the market. Xilinx has been our choice and they have been a very good partner to us too," added Matsuoka.
The VAXEL suite comes with 4 piece set of software: 1. VAXEL Console, a Windows application that includes FPGA Synthesis automation tools with the features to execute the verification from the host PC, 2. VAXEL Firm, an ARM firmware that installs at one of the ARM cores on the FPGA board and translates commands and requests from VAXEL Console and configures the FPGA, 3. Pre-qualified hardware IP blocks, and 4. A set of software libraries and interfaces to enable C and Python engineers to have additional contribution during the RTL verification phase.
The biggest benefit that VAXEL offers is the speed of test execution, thanks to the FPGA boards, with an additional significant benefit which is the ease of set up. With the software suite above, the setting up of the Test Bench becomes very easy allowing, furthermore, reuse of the set-up assets avoiding thus a waste of cost and time. This is a paradigm shift from the UVM and System Verilog world of verification.
VAXEL fits especially well in ASIC projects targeted for image processing, sensor ASICS, and AI chips because they frequently require a large test data set and numerous test cases where increasing the test coverage is not the most important goal.
VAXEL is architected such that it can connect an unlimited number of FPGA boards via USB and as such can run verification of multiple blocks. It also comes with assertion IPs and waveform extraction IPs.
VAXEL is just like a mini-Emulator that is extremely cost effective and this has been proven by a handful of Japanese image giants.
About VAXEL Inc.
VAXEL Inc www.vaxelinc.com was founded by a group of top verification engineers from Japan who provided design verification services to major Japanese OEMs for over 10 years. The verification acceleration tool VAXEL was invented by Yasu Sakakibara CTO and released to the market in 2017. The company has its HQ in San Jose CA and is let by Tadd Matsuoka CEO who has 30 years of experience in the semi-conductor industry. VAXEL is a Xilinx partner.
For contact email sales@vaxelinc.com
Contact
VAXEL Incorporated
Shige Sato
408-394-2745
www.vaxelinc.com
Shige Sato
408-394-2745
www.vaxelinc.com
Contact
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